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经典原版书库计算机组成与设计:硬件/软件接口(英文版 原书第5版 ARM版)

经典原版书库计算机组成与设计:硬件/软件接口(英文版 原书第5版 ARM版)

出版社:机械工业出版社出版时间:2020-11-23
开本: 其他 页数: 716
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经典原版书库计算机组成与设计:硬件/软件接口(英文版 原书第5版 ARM版) 版权信息

  • ISBN:9787111668350
  • 条形码:9787111668350 ; 978-7-111-66835-0
  • 装帧:一般胶版纸
  • 册数:暂无
  • 重量:暂无
  • 所属分类:>

经典原版书库计算机组成与设计:硬件/软件接口(英文版 原书第5版 ARM版) 本书特色

计算机体系结构新黄金时代必读之作,图灵奖得主经典著作全新ARM版,深入掌握软硬件协同设计思想

经典原版书库计算机组成与设计:硬件/软件接口(英文版 原书第5版 ARM版) 内容简介

本书采用ARMv8-A体系结构, 介绍当前硬件技术的基本原理、汇编语言、计算机算术、流水线、内存层次结构和I/O。本书更加关注后PC时代发生的变革,通过实例、练习等详细介绍*新涌现的移动计算和云计算,更新的内容还包括平板电脑、云基础设施以及ARM(移动计算设备)和x86 (云计算)体系结构。

经典原版书库计算机组成与设计:硬件/软件接口(英文版 原书第5版 ARM版) 目录

Preface xv
CHAPTERS
1 Computer Abstractions and Technology 2
11 Introduction 3
12 Eight Great Ideas in Computer Architecture 11
13 Below Your Program 13
14 Under the Covers 16
15 Technologies for Building Processors and Memory 24
16 Performance 28
17 The Power Wall 40
18 The Sea Change: The Switch from Uniprocessors to Multiprocessors 43
19 Real Stuff: Benchmarking the Intel Core i7 46
110 Fallacies and Pitfalls 49
111 Concluding Remarks 52
112 Historical Perspective and Further Reading 54
113 Exercises 54
2 Instructions: Language of the Computer 60
21 Introduction 62
22 Operations of the Computer Hardware 63
23 Operands of the Computer Hardware 67
24 Signed and Unsigned Numbers 75
25 Representing Instructions in the Computer 82
26 Logical Operations 90
27 Instructions for Making Decisions 93
28 Supporting Procedures in Computer Hardware 100
29 Communicating with People 110
210 LEGv8 Addressing for Wide Immediates and Addresses 115
211 Parallelism and Instructions: Synchronization 125
212 Translating and Starting a Program 128
213 A C Sort Example to Put it All Together 137
214 Arrays versus Pointers 146
215 Advanced Material: Compiling C and Interpreting Java 150
216 Real Stuff: MIPS Instructions 150
217 Real Stuff: ARMv7 (32-bit) Instructions 152
218 Real Stuff: x86 Instructions 154
219 Real Stuff: The Rest of the ARMv8 Instruction Set 163
220 Fallacies and Pitfalls 169
221 Concluding Remarks 171
222 Historical Perspective and Further Reading 173
223 Exercises 174
3 Arithmetic for Computers 186
31 Introduction 188
32 Addition and Subtraction 188
33 Multiplication 191
34 Division 197
35 Floating Point 205
36 Parallelism and Computer Arithmetic: Subword Parallelism 230
37 Real Stuff: Streaming SIMD Extensions and Advanced Vector Extensions in x86 232
38 Real Stuff: The Rest of the ARMv8 Arithmetic Instructions 234
39 Going Faster: Subword Parallelism and Matrix Multiply 238
310 Fallacies and Pitfalls 242
311 Concluding Remarks 245
312 Historical Perspective and Further Reading 248
313 Exercises 249
4 The Processor 254
41 Introduction 256
42 Logic Design Conventions 260
43 Building a Datapath 263
44 A Simple Implementation Scheme 271
45 An Overview of Pipelining 283
46 Pipelined Datapath and Control 297
47 Data Hazards: Forwarding versus Stalling 316
48 Control Hazards 328
49 Exceptions 336
410 Parallelism via Instructions 342
411 Real Stuff: The ARM Cortex-A53 and Intel Core i7 Pipelines 355
412 Going Faster: Instruction-Level Parallelism and Matrix Multiply 363
413 Advanced Topic: An Introduction to Digital Design Using a Hardware Design Language to Describe and Model a Pipeline and More Pipelining Illustrations 366
414 Fallacies and Pitfalls 366
415 Concluding Remarks 367
416 Historical Perspective and Further Reading 368
417 Exercises 368
5 Large and Fast: Exploiting Memory Hierarchy 386
51 Introduction 388
52 Memory Technologies 392
53 The Basics of Caches 397
54 Measuring and Improving Cache Performance 412
55 Dependable Memory Hierarchy 432
56 Virtual Machines 438
57 Virtual Memory 441
58 A Common Framework for Memory Hierarchy 465
59 Using a Finite-State Machine to Control a Simple Cache 472
510 Parallelism and Memory Hierarchy: Cache Coherence 477
511 Parallelism and Memory Hierarchy: Redundant Arrays of Inexpensive Disks 481
512 Advanced Material: Implementing Cache Controllers 482
513 Real Stuff: The ARM Cortex-A53 and Intel Core i7 Memory Hierarchies 482
514 Real Stuff: The Rest of the ARMv8 System and Special Instructions 487
515 Going Faster: Cache Blocking and Matrix Multiply 488
516 Fallacies and Pitfalls 491
517 Concluding Remarks 496
518 Historical Perspective and Further Reading 497
519 Exercises 497
6 Parallel Processors from Client to Cloud 514
61 Introduction 516
62 The Difficulty of Creating Parallel Processing Programs 51
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